indirect address - определение. Что такое indirect address
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Что (кто) такое indirect address - определение

ASPECT OF THE INSTRUCTION SET ARCHITECTURE IN MOST CENTRAL PROCESSING UNIT DESIGNS
Addressing modes; Indirect word; Address mode; Indirect address; Absolute coding; Absolute and relative coding; Indexed addressing; Indirect addressing; Relative coding; Effective address; Load Effective Address; Push Effective Address; Indirection bit; Indirection (computing); Special addressing modes for implementation of stacks; Conditional execution; Register indirect; Direct addressing; Address modes; Direct-addressing; Direct address (computing)
Найдено результатов: 726
indirect address         
<processor> An addressing mode found in many processors' instruction sets where the instruction contains the address of a memory location which contains the address of the operand (the "effective address") or specifies a register which contains the effective address. In the first case (indirection via memory), accessing the operand requires two memory accesses - one to fetch the effective address and another to read or write the actual operand. Register indirect addressing requires only one memory access. An indirect address may be indicated in assembly language by an operand in parentheses, e.g. in Motorola 68000 assembly MOV D0,(A0) writes the contents of register D0 to the location pointed to by the address in register A0. Indirect addressing is often combined with pre- or post- increment or decrement addressing, allowing the address of the operand to be increased or decreased by one (or some specified number) either before or after using it. (1994-11-07)
indirect addressing         
addresses         
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  • James Fitton]] (1958)
COLLECTION OF INFORMATION THAT DESCRIBES THE LOCATION OF A BUILDING, APARTMENT, OR OTHER STRUCTURE
Address (geographical); Adress; Street address; Address (geography); Postal address; Mailing address format by country; Addresses; Mail address; Mailing address; Post adress; Addresse; Postal Addresse; Postal addresse; Post address; Postal addresses in the United Kingdom; Postal address (United States); United Kingdom postal addresses; Addresses in the UK; Address conventions by country; Addresses in Palau; Addess; Address (geography; Address format; Home address; Postal addresses in the netherlands; US address
archaic courteous or amorous approaches.
address resolution         
WIKIMEDIA DISAMBIGUATION PAGE
Address resolution; Address Resolution; Address translation (disambiguation)
<networking> Conversion of an Internet address into the corresponding physical address (Ethernet address). This is usually done using Address Resolution Protocol. The resolver is a library routine and a set of processes which converts hostnames into Internet addresses, though this process in not usually referred to as resolution. See DNS. (1996-04-09)
Address         
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  • James Fitton]] (1958)
COLLECTION OF INFORMATION THAT DESCRIBES THE LOCATION OF A BUILDING, APARTMENT, OR OTHER STRUCTURE
Address (geographical); Adress; Street address; Address (geography); Postal address; Mailing address format by country; Addresses; Mail address; Mailing address; Post adress; Addresse; Postal Addresse; Postal addresse; Post address; Postal addresses in the United Kingdom; Postal address (United States); United Kingdom postal addresses; Addresses in the UK; Address conventions by country; Addresses in Palau; Addess; Address (geography; Address format; Home address; Postal addresses in the netherlands; US address
·vi To direct speech.
II. Address ·vi To prepare one's self.
III. Address ·v To prepare or make ready.
IV. Address ·vt Act of preparing one's self.
V. Address ·vt Attention in the way one's addresses to a lady.
VI. Address ·v To clothe or array; to Dress.
VII. Address ·vt Skill; skillful management; dexterity; adroitness.
VIII. Address ·v To Aim; to Direct.
IX. Address ·vt Act of addressing one's self to a person; verbal application.
X. Address ·vt Manner of speaking to another; delivery; as, a man of pleasing or insinuating address.
XI. Address ·v To make suit to as a lover; to Court; to Woo.
XII. Address ·v To direct in writing, as a letter; to superscribe, or to direct and transmit; as, he addressed a letter.
XIII. Address ·v To direct, as words (to any one or any thing); to make, as a speech, petition, ·etc. (to any one, an audience).
XIV. Address ·vt Direction or superscription of a letter, or the name, title, and place of residence of the person addressed.
XV. Address ·v Reflexively: To prepare one's self; to apply one's skill or energies (to some object); to Betake.
XVI. Address ·v To consign or intrust to the care of another, as agent or factor; as, the ship was addressed to a merchant in Baltimore.
XVII. Address ·v To direct speech to; to make a communication to, whether spoken or written; to apply to by words, as by a speech, petition, ·etc., to speak to; to Accost.
XVIII. Address ·vt A formal communication, either written or spoken; a discourse; a speech; a formal application to any one; a petition; a formal statement on some subject or special occasion; as, an address of thanks, an address to the voters.
Indirect branch         
Indirect jump; Computed jump; Register-indirect jump
An indirect branch (also known as a computed jump, indirect jump and register-indirect jump) is a type of program control instruction present in some machine language instruction sets. Rather than specifying the address of the next instruction to execute, as in a direct branch, the argument specifies where the address is located.
Indirect pathway         
  • Depicted are parts of the basal ganglia and their interconnections as revealed by diffusion spectrum imaging based on thirty subjects from the human connectome project (HCP MGH). Direct, indirect and hyperdirect pathways are visualized in different colors (see legend). Subcortical structures are rendered based on the Harvard-Oxford subcortical (Thalamus) as well as the Atlasing of the Basal Ganglia atlas (other structures). Rendering was generated using TrackVis software.
NEURONAL CIRCUIT THROUGH THE BASAL GANGLIA AND SEVERAL ASSOCIATED NUCLEI WITHIN THE CENTRAL NERVOUS SYSTEM WHICH HELPS TO PREVENT UNWANTED MUSCLE CONTRACTIONS FROM COMPETING WITH VOLUNTARY MOVEMENTS
Indirect pathway of movement
The indirect pathway, sometimes known as the indirect pathway of movement, is a neuronal circuit through the basal ganglia and several associated nuclei within the central nervous system (CNS) which helps to prevent unwanted muscle contractions from competing with voluntary movements. It operates in conjunction with the direct pathway.
MAC address         
  • The structure of a 48-bit MAC address. The b0 bit distinguishes [[multicast]] and [[unicast]] addressing and the b1 bit distinguishes universal and locally administered addressing.
  • Label of a [[UMTS]] router with MAC addresses for [[LAN]] and [[WLAN]] modules
UNIQUE IDENTIFIER ASSIGNED TO NETWORK INTERFACES FOR COMMUNICATIONS ON THE PHYSICAL NETWORK SEGMENT
Burned-in address; Locally Administered Address; Univerally Administered Address; MAC-48; EUI-48; EUI-64; Mac address; MAC Address; Ethernet address; MAC-address; EUI64; MAC addresses; Media access control address; Mac Address; Ethernet Hardware Address; Extended Unique Identifier; Hw address; Burned-in addresses; Burned-In Address; Hardware address; Hardware Address; Media Access Control address; Locally administered address
The hardware address of a device connected to a shared network medium. See also Media Access Control.
Free indirect speech         
STYLE OF THIRD-PERSON NARRATION WHICH USES SOME OF THE CHARACTERISTICS OF THIRD-PERSON ALONG WITH THE ESSENCE OF FIRST-PERSON DIRECT SPEECH
Free indirect discourse; Free indirect style; Discours indirect libre; Dual voice
Free indirect speech is a style of third-person narration which uses some of the characteristics of third-person along with the essence of first-person direct speech; it is also referred to as free indirect discourse, free indirect style, or, in French, discours indirect libre.
address         
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  • James Fitton]] (1958)
COLLECTION OF INFORMATION THAT DESCRIBES THE LOCATION OF A BUILDING, APARTMENT, OR OTHER STRUCTURE
Address (geographical); Adress; Street address; Address (geography); Postal address; Mailing address format by country; Addresses; Mail address; Mailing address; Post adress; Addresse; Postal Addresse; Postal addresse; Post address; Postal addresses in the United Kingdom; Postal address (United States); United Kingdom postal addresses; Addresses in the UK; Address conventions by country; Addresses in Palau; Addess; Address (geography; Address format; Home address; Postal addresses in the netherlands; US address
1. <networking> e-mail address. 2. <networking> IP address. 3. <networking> MAC address. 4. <storage, programming> An unsigned integer used to select one fundamental element of storage, usually known as a word from a computer's main memory or other storage device. The CPU outputs addresses on its address bus which may be connected to an address decoder, cache controller, {memory management unit}, and other devices. While from a hardware point of view an address is indeed an integer most strongly typed programming languages disallow mixing integers and addresses, and indeed addresses of different data types. This is a fine example for {syntactic salt}: the compiler could work without it but makes writing bad programs more difficult. (1997-07-01)

Википедия

Addressing mode

Addressing modes are an aspect of the instruction set architecture in most central processing unit (CPU) designs. The various addressing modes that are defined in a given instruction set architecture define how the machine language instructions in that architecture identify the operand(s) of each instruction. An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.

In computer programming, addressing modes are primarily of interest to those who write in assembly languages and to compiler writers. For a related concept see orthogonal instruction set which deals with the ability of any instruction to use any addressing mode.